| When the SPI module operates in Host mode (MSTEN = 1) with the
peripheral bus selected as the clock source (MCLKEN =
0), the module may exhibit unreliable operation.
Internal synchronization timing cannot be guaranteed across all
operating conditions. This issue occurs regardless of SPI clock
polarity/phase settings (CKP, CKE, SMP bits) and affects both dedicated
SPI pins and remappable (PPS) pins. Client mode operation is not
affected. |
| Workaround Configure the SPI module to use the dedicated clock
generator (CLKGENx) as the clock source by setting SPIxCON1.MCLKEN =
1 when the module is used in Host mode (MSTEN =
1). |
| Affected Silicon Revisions |
