35.17 ADC

Table 35-23. Power Supply, Reference and Input Range
Operating conditions: V_DD = 3.0V T_A = 25°C Sample rate defined for SAMPDUR = `0x02` with ADC in Free-Running mode Applies for all allowed combinations of VREF selections and sample rates, unless otherwise specified Characteristics are identical with and without PGA enabled, unless otherwise specified
Symbol	Description	Min.	Typ.✝	Max.	Unit	Conditions
V_DD	Supply voltage	1.8	—	5.5	V
V_REF	Reference voltage	1.024	—	V_DD	V
C_IN	Input capacitance	—	2.5	—	pF	PGA disabled
C_IN	Input capacitance	—	7	—	pF	PGA enabled
R_IN	Input resistance	—	3	—	kΩ	PGA disabled
R_IN	Input resistance	—	2.5	—	kΩ	PGA enabled
V_IN	Input voltage range	0	—	V_REF	V	Single-ended mode
V_IN	Input voltage range	-0.1	—	V_DD + 0.1	V	Differential mode
✝ Data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

Table 35-24. Clock and Timing Characteristics
Operating conditions: V_DD = 3.0V T_A = 25°C Sample rate defined for SAMPDUR = `0x02` with ADC in Free-Running mode Applies for all allowed combinations of VREF selections and sample rates, unless otherwise specified Characteristics are identical with and without PGA enabled, unless otherwise specified
Symbol	Description	Min.	Typ.✝	Max.	Unit	Conditions
CLK_ADC	ADC clock frequency	300	—	2000	kHz	REFSEL = Internal Reference
CLK_ADC	ADC clock frequency	300	—	6000	kHz	REFSEL = External Reference REFSEL = V_DD
✝ Data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

Table 35-25. Accuracy Characteristics
Operating conditions: V_DD = 3.0V V_DD = V_REF T_A = 25°C f_{CLK_ADC} = 2 MHz Sample rate defined for SAMPDUR = `0x02` with ADC in Free-Running mode Applies for all allowed combinations of VREF selections and sample rates, unless otherwise specified Characteristics are identical with and without PGA enabled, unless otherwise specified
Symbol	Description	Min.	Typ.✝	Max.	Unit	Conditions
Res	Resolution	—	—	12	bit
E_INL	Integral nonlinearity	—	0.8	—	LSb	V_DD = 3.0V V_REF = 2.048V CLK_ADC = 2.5 MHz Differential mode
E_DNL	Differential nonlinearity	—	0.8	—
E_OFF	Offset error	—	1.5	—
E_GAIN	Gain error	—	0.6	—
E_T	Total unadjusted error	—	5	—
✝ Data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

Table 35-26. Accuracy Characteristics with PGA Enabled
Operating conditions: V_DD = 3.0V -40°C ≤ T_A ≤ 125°C Sample rate defined for SAMPDUR = `0x02` with ADC in Free-Running mode Applies for all allowed combinations of VREF selections and sample rates, unless otherwise specified Characteristics are identical with and without PGA enabled, unless otherwise specified
Symbol	Description	Min.	Typ.✝	Max.	Unit	Conditions
N_RMS	Input noise	—	32	—	µV_RMS	PGA Gain = 1V/V
		—	63	—		PGA Gain = 2V/V
		—	125	—		PGA Gain = 4V/V
		—	250	—		PGA Gain = 8V/V
		—	500	—		PGA Gain = 16V/V
E_GAIN	Gain error	—	-0.2	—	%	PGA Gain = 1V/V
		—	-0.2	—		PGA Gain = 2V/V
		—	-0.3	—		PGA Gain = 4V/V
		—	-0.6	—		PGA Gain = 8V/V
		—	-0.8	—		PGA Gain = 16V/V
✝ Data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.