13.27.8.3 Reference Control
Name: | REFCTRL |
Offset: | 0x02 |
Reset: | 0x00 |
Property: | PAC Write-Protection, Enable-Protected |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
REFCOMP | REFSEL[3:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bit 7 – REFCOMP Reference Buffer Offset Compensation Enable
The gain error can be reduced by enabling the reference buffer offset compensation. This will decrease the input impedance and, thus, increase the start-up time of the reference.
Value | Description |
---|---|
0 | Reference buffer offset compensation is disabled. |
1 | Reference buffer offset compensation is enabled. |
Bits 3:0 – REFSEL[3:0] Reference Selection
These bits select the reference for the ADC.
Value | Name | Description |
---|---|---|
0x0 | INTREF | Internal variable reference voltage |
x01 | INTVCC0 | 1/1.6 VDDANA |
0x2 | INTVCC1 | 1/2 VDDANA (only for VDDANA > 2.0V) |
0x3 | — | — |
0x4 | VREFB | External reference |
0x5 | INTVCC2 | VDDANA |
0x6 - 0xF | — | Reserved |