13.8.8.5 Interrupt Enable Set
| Name: | INTENSET |
| Offset: | 0x05 |
| Reset: | 0x00 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PLRDY | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
Bit 0 – PLRDY Performance Level Ready Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will set the Performance Ready Interrupt Enable bit and enable the Performance Ready interrupt.
| Value | Description |
|---|---|
| 0 | The Performance Ready interrupt is disabled. |
| 1 | The Performance Ready interrupt is enabled. |