26.9.10 AIC Interrupt Pending Register 3

The reset value of this register depends on the level of the external interrupt source. All other sources are cleared at reset, thus not pending.

PID96...PID127 bit fields refer to the identifiers as defined in the Peripheral Identifiers section.

Name: AIC_IPR3
Offset: 0x2C
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
 PID127PID126PID125PID124PID123PID122PID121PID120 
Access RRRRRRRR 
Reset 00000000 
Bit 2322212019181716 
 PID119PID118PID117PID116PID115PID114PID113PID112 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 PID111PID110PID109PID108PID107PID106PID105PID104 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 PID103PID102PID101PID100PID99PID98PID97PID96 
Access RRRRRRRR 
Reset 00000000 

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – PIDx Interrupt Pending

ValueDescription
0

The corresponding interrupt is not pending.
1

The corresponding interrupt is pending.