26.9.7 AIC Interrupt Pending Register 0
| Name: | AIC_IPR0 |
| Offset: | 0x20 |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| PID31 | PID30 | PID29 | PID28 | PID27 | PID26 | PID25 | PID24 | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| PID23 | PID22 | PID21 | PID20 | PID19 | PID18 | PID17 | PID16 | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PID15 | PID14 | PID13 | PID12 | PID11 | PID10 | PID9 | PID8 | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PID7 | PID6 | PID5 | PID4 | PID3 | PID2 | SYS | FIQ | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32 – PIDx Interrupt Pending
| Value | Description |
|---|---|
| 0 | The corresponding interrupt is not pending. |
| 1 | The corresponding interrupt is pending. |
Bit 1 – SYS Interrupt Pending
| Value | Description |
|---|---|
| 0 | The corresponding interrupt is not pending. |
| 1 | The corresponding interrupt is pending. |
Bit 0 – FIQ Interrupt Pending
| Value | Description |
|---|---|
| 0 | The corresponding interrupt is not pending. |
| 1 | The corresponding interrupt is pending. |
