32.5.9 Bus Monitor, Performance Monitor

The MPDDRC embeds a bus monitor which collects bus transaction information from 4 MPDDRC ports. This information, such as accumulated latency (MPDDRC_MINFOx (TOTAL_LATENCY)) or number of transfers (MPDDRC_MINFOx (NB_TRANSFERS)), can be used to calculate the latency and bandwidth for each port by using a metric counter.

The following metrics are computed for each port within a configurable address range:
  • Total number of write transfers
  • Total number of read transfers
  • Total number of read/write transfers
  • Total read latencies
  • Total write latencies
  • Total write/read latencies
  • Maximum latencies per port
  • Total latency vs QoS value

The Monitor Configuration (MPDDRC_MCFGR) and Monitor Address High/Low Port x (MPDDRC_MADDRx) registers define the type of transaction collected (read, write or read/write) and the address range to monitor.

MPDDRC address mapping is from 0x2000_0000 to 0x2FFF_FFFF. To define the address range analyzed by the monitor, the address bits [27:13] are used to configure the lower and upper bounds. The lower bound can be modified by writing the field MPDDRC_MADDRx.ADDR_LOW_PORTx. The upper bound can be modified by writing the field MPDDRC_MADDRx.ADDR_HIGH_PORTx. The minimum range that can be analyzed is 8 Kbytes.

By default, the monitor is enabled and the address range is 0x2000_0000 to 0x2FFF_FFFF.

Monitor use example:

  1. Clear the configuration register: write 0x00000000 in MPDDRRC_MCFGR.
  2. Enable the monitor: write 0x00000001 in MPDDRRC_MCFGR.
  3. Reset the monitor: write 0x00000003 in MPDDRRC_MCFGR.
  4. Enable the monitor: write 0x00000001 in MPDDRRC_MCFGR.
  5. Define the address range in MPDDRC_MADDRx or use the default value.
  6. Start monitoring: write 0x00000011 in MPDDRRC_MCFGR.
  7. Monitoring is launched. An event can be used to stop monitoring.
  8. Stop profiling: write 0x00000001 in MPDDRRC_MCFGR.
  9. To know the number of tranfers per port, write 0x00000801 in MPDDRRC_MCFGR and read MPDDRC_MINFOx (NB_TRANSFERS).
Use the following formulas to compute the latency and bandwidth for each port (in percent):
  • Latency:

    (Px_TOTAL_LATENCY/TOTAL_CYCLE_COUNT) *100

  • Bandwidth:

    (Px_TOTAL_Px_NB_TRANSFERS/TOTAL_CYCLE_COUNT) *100