4 Generic Sample Factory Settings

The Microchip gate drivers are designed to provide safe, secure, and efficient operation of the SiC MOSFET power module, as well as to provide unparalleled information on the condition of the overall system.

Generic samples are set at the factory to perform certain actions (for example, turn-off the HI side or LO side of the SiC MOSFET) and to report that a fault occurred based on performance parameters that occur outside of default ranges.

The following tables list the generic configurations of the gate driver.

Table 4-1. Performance and Interconnect Settings
Parameter	Generic Factory Setting	Value	Unit
Turn-on gate resistance (R_GON)	Populated	1.1	Ω
Turn-off gate resistance (R_GOFF)	Populated	1.1	Ω
Desaturation Time	Enabled	1.5	µs
Dead time	Enabled	1	µs
Fault reset	Auto	5	ms
DC link voltage fault	Enabled	900	V
Temperature fault	Enabled	125	°C
UVLO primary	Enabled	13.2	V
OVLO primary	Enabled	16.5	V
J1 (20-pin control or power header)	Populated	—	—
J5 (2-pin thermistor header)	Populated	—	—
J6 (5-pin main or secondary header)	Not populated	—	—
J7 (4-pin main or secondary header)	Not populated	—	—

Table 4-2. Fault and Monitoring Conditions
Fault Condition/Action	Generic Sample Default Trigger Values	Action on IGBT if Active (Default Setting)	HI Fault	LO Fault	All Faults
No faults	—	—	HIGH	HIGH	HIGH
DSAT/UVLO—HI	See Electrical Characteristics	Turn-off HI and LO side	LOW	HIGH	LOW
DSAT/UVLO—LO	See Electrical Characteristics	Turn-off HI and LO side	HIGH	LOW	LOW
OVLO	See Electrical Characteristics	Turn-off HI and LO side	HIGH	HIGH	LOW
Temperature fault	125 °C thermistor monitor	No action	HIGH	HIGH	LOW
DC link voltage fault	DC link voltage above or below setting	Turn-off HI and LO side	HIGH	HIGH	LOW
Power-on configuration fault¹	Failure to configure gate drivers	Turn-off HI and LO side	LOW	LOW	LOW

Note:

After power up, if all fault lines are LOW, then either there is a real fault (UVLO/DSAT) on both the HI and LO sides, or there has been a software configuration failure.