Asynchronous (with clock reconstruction) or synchronous operation
Internal or external clock source for asynchronous and synchronous operation
Baud-rate generator
Supports serial frames with 5, 6, 7, 8
or 9 data bits and 1 or 2 stop bits
Odd or even parity generation and parity check
Selectable LSB- or MSB-first data
transfer
Buffer overflow and frame error detection
Noise filtering, including false start-bit detection and digital low-pass filter
Collision detection
Sleep modes operation supported
RTS and CTS flow control
IrDA modulation and demodulation up to
115.2kbps
LIN Host support
LIN Client
support
Auto-baud and break character
detection
ISO7816 T=0 or T=1 protocols for Smart
Card interfacing
RS485 Support
Start-of-frame detection
Receive buffer: 8-bytes FIFO
Transmit buffer: 8-bytes FIFO
DMA operations supported
32-bit extension for better system bus
utilization
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
