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Arm® Arm926EJ-S™ Processor-Based MPU, 800 MHz, MIPI DSI® or CSI-2, LVDS, RGB, 2D Graphics, Gigabit Ethernet with TSN, CAN-FD, Octal/Quad SPI, Crypto, PUF
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5
Image Subsystem
5.8
Image Sensor Controller (ISC)
5.8.6
Functional Description
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Image Subsystem
5.1
Overview
5.2
LCD Controller (LCDC)
5.3
Low Voltage Differential Signaling Controller (LVDSC)
5.4
2D Graphics Engine (GFX2D)
5.5
Display Serial Interface (DSI)
5.6
Camera Serial Interface (CSI)
5.7
CSI-2 Demultiplexer Controller (CSI2DC)
5.8
Image Sensor Controller (ISC)
5.8.1
Description
5.8.2
Embedded Characteristics
5.8.3
ISC Block Diagram and Use Cases
5.8.4
I/O Lines Description
5.8.5
Product Dependencies
5.8.6
Functional Description
5.8.6.1
ISC Clock Management
5.8.6.2
Parallel Interface Timing Description
5.8.6.3
BT.601/656/1120 Embedded Timing Synchronization Operation
5.8.6.4
Parallel Interface External Sensor Connections
5.8.6.5
MIPI Interface Mapping
5.8.6.6
Parallel Front End (PFE) Module
5.8.6.7
Defective Pixel Correction (DPC)
5.8.6.8
Green Disparity Correction (GDC)
5.8.6.9
Black Level Correction (BLC)
5.8.6.10
White Balance (WB) Module
5.8.6.11
Color Filter Array (CFA) Interpolation Module
5.8.6.12
Color Correction (CC) Module
5.8.6.13
Gamma Curve (GAM) Module
5.8.6.14
Scaler Function
5.8.6.15
Color Space Conversion (CSC) Module
5.8.6.16
Contrast, Brightness, Hue and Saturation
5.8.6.17
4:4:4 To 4:2:2 Chrominance Horizontal Subsampler (SUB422) Module
5.8.6.18
4:2:2 To 4:2:0 Chrominance Vertical Subsampler (SUB420) Module
5.8.6.19
Rounding, Limiting and Packing (RLP) Module
5.8.6.20
DMA Interface
5.8.6.21
Histogram Module
5.8.6.22
Register Write Protection
5.8.7
Register Summary
6
Audio Subsystem
7
Security and Cryptography Subsystem
8
Connectivity Subsystem
9
USB Subsystem
10
Electrical and Mechanical Characteristics
11
Revision History
Microchip Information
5.8.6 Functional Description
