Jump to main content
Arm® Arm926EJ-S™ Processor-Based MPU, 800 MHz, MIPI DSI® or CSI-2, LVDS, RGB, 2D Graphics, Gigabit Ethernet with TSN, CAN-FD, Octal/Quad SPI, Crypto, PUF
Arm® Arm926EJ-S™ Processor-Based MPU, 800 MHz, MIPI DSI® or CSI-2, LVDS, RGB, 2D Graphics, Gigabit Ethernet with TSN, CAN-FD, Octal/Quad SPI, Crypto, PUF
Product Pages
SAM9X70 SAM9X72 SAM9X75
  1. Home
  2. 7 Security and Cryptography Subsystem
  3. 7.6 Physical Unclonable Functions (PUF)
  4. 7.6.5 Functional Description
  5. 7.6.5.5 PUF Controller Operations
  6. 7.6.5.5.11 Generate Random Operation

  • Introduction
  • Reference Document
  • 1 Overview
  • 2 CPU and Interconnect
  • 3 Memories
  • 4 System Controller
  • 5 Image Subsystem
  • 6 Audio Subsystem
  • 7 Security and Cryptography Subsystem
    • 7.1 Overview
    • 7.2 Advanced Encryption Standard (AES)
    • 7.3 Secure Hash Algorithm (SHA)
    • 7.4 Triple Data Encryption Standard (TDES)
    • 7.5 Random Number Generator (TRNG)
    • 7.6 Physical Unclonable Functions (PUF)
      • 7.6.1 Description
      • 7.6.2 Embedded Characteristics
      • 7.6.3 Block Diagram
      • 7.6.4 Product Dependencies
      • 7.6.5 Functional Description
        • 7.6.5.1 PUF Introduction
        • 7.6.5.2 PUF Operations
        • 7.6.5.3 Security Strength Versus Key Length
        • 7.6.5.4 PUF Controller States
        • 7.6.5.5 PUF Controller Operations
          • 7.6.5.5.1 Introduction
          • 7.6.5.5.2 Initialization Operation
          • 7.6.5.5.3 Enroll Operation
          • 7.6.5.5.4 Start Operation
          • 7.6.5.5.5 Reconstruct Operation
          • 7.6.5.5.6 Stop Operation
          • 7.6.5.5.7 Get Key Operation
          • 7.6.5.5.8 Wrap Generated Random Operation
          • 7.6.5.5.9 Wrap Operation
          • 7.6.5.5.10 Unwrap Operation
          • 7.6.5.5.11 Generate Random Operation
          • 7.6.5.5.12 Reseed Operation
          • 7.6.5.5.13 Test Memory Operation
          • 7.6.5.5.14 Test PUF Operation
          • 7.6.5.5.15 Zeroize Operation
        • 7.6.5.6 PUF Data Formats
        • 7.6.5.7 PUF Operation Restrictions
        • 7.6.5.8 PUF Error Handling
        • 7.6.5.9 PUF Diagnostics
        • 7.6.5.10 PUF Built-in Tests
        • 7.6.5.11 PUF Deterministic Random Number Generator (DRNG)
      • 7.6.6 Register Summary
  • 8 Connectivity Subsystem
  • 9 USB Subsystem
  • 10 Electrical and Mechanical Characteristics
  • 11 Revision History
  • Microchip Information

7.6.5.5.11 Generate Random Operation

The Generate Random operation outputs the requested amount of random data as specified in a provided context. The context is defined in Context Specification for Generate Random Operation.

About

Company
Careers
Contact Us
Media Center
Investor Relations
Corporate Responsibility

Support

Microchip Forums
AVR Freaks
Design Help
Technical Support
Export Control Data
PCNs

Quick Links

microchipDIRECT.com
Microchip University
myMicrochip
Blogs
Reference Designs
Parametric Search
Microchip Logo

Microchip Technology Inc.

2355 West Chandler Blvd.

Chandler, Arizona, USA

Microchip Facebook
Microchip LinkedIn
Microchip Twitter
Microchip Instagram
Microchip Weibo

© Copyright 1998-2024 Microchip Technology Inc. All rights reserved. Shanghai ICP Recordal No.09049794

Terms Of Use
Privacy Notice
Legal
Your Privacy Choices California Consumer Privacy Act (CCPA) Opt-Out Icon