4.2.2 NAND Flash
The SAM4E Xplained Pro kit has one external Micron MT29F2G08ABAEAWP:E 2Gb NAND flash connected to the external bus interface of the SAM4E. The NAND flash is connected to chip select NCS0. NAND flash access can be configures in the Static Memory Controller in the SAM4E.
The R/B (read/busy) signal from the NAND flash is connected to PB12, which is configured as SAM4E chip erase by default. In order to utilize the R/B signal PB12 must be configured as a normal I/O pin in the CCFG_SYSIO register located in the MATRIX module and the internal pull-up has to be enabled. For more information see the SAM4E datasheet.
Table 4-7 lists all I/O-lines connected to the NAND flash.
| SAM4E pin | Function | NAND Flash function | Shared functionality |
|---|---|---|---|
| PC0 | D0 | SRAM, LCD connector, and EBI spare header | |
| PC1 | D1 | SRAM, LCD connector, and EBI spare header | |
| PC2 | D2 | SRAM, LCD connector, and EBI spare header | |
| PC3 | D3 | SRAM, LCD connector, and EBI spare header | |
| PC4 | D4 | SRAM, LCD connector, and EBI spare header | |
| PC5 | D5 | SRAM, LCD connector, and EBI spare header | |
| PC6 | D6 | SRAM, LCD connector, and EBI spare header | |
| PC7 | D7 | SRAM, LCD connector, and EBI spare header | |
| PC17 | NANDCLE | CLE | |
| PC16 | NANDALE | ALE | |
| PC10 | NANDWE | #Write Enable | |
| PC9 | NANDOE | #Read Enable | |
| PC14 | NCS0 | #Chip Enable | |
| PB12 | GPIO | Ready/#Busy | ERASE pin |