4.2.1 SRAM
The SAM4E Xplained Pro features two external ISSI IS61WV5128BLL-10TLI, 512Kx8, 10ns, SRAMs, SRAM0 and SRAM1. SRAM0 is connected to chip select NCS1 and SRAM1 is connected to chip select NCS3. SRAM access can be configured in the Static Memory Controller in the SAM4E.
Table 4-6 lists all I/O-lines connected to the SRAMs.
Pin on SAM4E | Function | SRAM function | Shared functionality |
---|---|---|---|
PC0 | D0 | Data line 0 | NAND, LCD connector, and EBI spare header |
PC1 | D1 | Data line 1 | NAND, LCD connector, and EBI spare header |
PC2 | D2 | Data line 2 | NAND, LCD connector, and EBI spare header |
PC3 | D3 | Data line 3 | NAND, LCD connector, and EBI spare header |
PC4 | D4 | Data line 4 | NAND, LCD connector, and EBI spare header |
PC5 | D5 | Data line 5 | NAND, LCD connector, and EBI spare header |
PC6 | D6 | Data line 6 | NAND, LCD connector, and EBI spare header |
PC7 | D7 | Data line 7 | NAND, LCD connector, and EBI spare header |
PC18 | A0 | Address line 0 | |
PC19 | A1 | Address line 1 | |
PC20 | A2 | Address line 2 | |
PC21 | A3 | Address line 3 | |
PC22 | A4 | Address line 4 | |
PC23 | A5 | Address line 5 | |
PC24 | A6 | Address line 6 | |
PC25 | A7 | Address line 7 | |
PC26 | A8 | Address line 8 | |
PC27 | A9 | Address line 9 | |
PC28 | A10 | Address line 10 | |
PC29 | A11 | Address line 11 | |
PC30 | A12 | Address line 12 | |
PC31 | A13 | Address line 13 | |
PA18 | A14 | Address line 14 | |
PA19 | A15 | Address line 15 | |
PA20 | A16 | Address line 16 | |
PA0 | A17 | Address line 17 | |
PA1 | A18 | Address line 18 | |
PD18 | NCS1 | #Chip Enable (on SRAM0) | |
PD19 | NCS3 | #Chip Enable (on SRAM1) | |
PC8 | NWE | #Write Enable | LCD Connector and EBI spare header |
PC11 | NRD | #Output Enable | LCD Connector and EBI spare header |