23.4.3.5 Watchdog Reset

The watchdog reset is entered when a watchdog fault occurs. This state lasts two 32 kHz cycles.

The watchdog timer is reset by the processor reset signal. As the watchdog fault always causes a processor reset if WDT_MR.WDRSTEN is set, the watchdog timer is always reset after a watchdog reset and the watchdog is enabled by default and with a period set to a maximum.

When WDT_MR.WDRSTEN is reset, the watchdog fault has no impact on the reset controller.