16.5.7.6.2 Hardware Considerations (MRL C)

The ROM code configures the hardware so that:

• the QSPI controller uses SPI Mode 0 (CPOL = 0 and CPHA = 0),
• the QSPIx_SCK clock frequency is ≤ 50 MHz,
• QSPIx_SCK and QSPIx_CS do not use any internal pull-up/pull-down resistor,
• each QSPIx_IO{0,1,2,3} uses the PIO controller’s internal pull-up resistor.