3.7 Current Doubler Rectifier Stage

The Current Doubler Rectifier (CDR) stage reduces peak current requirement in the output inductors and secondary winding of the transformer.

Figure 3-9. Current Doubler Rectifier Stage Current Flow

Figure 3-9 shows how current flows through PSFB-CDR. During the first half-period of 5 µs (for 100kHz system), the diagonal (Q1, Q3) delivers power to the output stage through the main transformer. This current flows through the CDR in such a way that the transformer secondary carries approximately the same current as either L1 or L2 current.

L1 and L2 both carry approximately half the output current plus inductor ripple current:

i_{l o} (t) = \frac{I_{o}}{2} + i_{l o a c} (t)

During this time, SR1 does not conduct significant current while SR2 carries output current plus total AC ripple component of L2 and L1 (through the transformer):

i_{S R} (t) = I_{o} + i_{l 1 a c} (t) + i_{l 2 a c} (t)

In the 2nd half of the switching cycle, the active diagonal switches (Q2, Q4) and current path switches from SR2 to SR1. Ripple cancellation takes place at the output of both inductors, reducing requirements of output capacitance.

Output inductors work in an interleaved manner. As demonstrated in the equation, SR2 and SR1 carry very high currents alternatively during each half-period of the switching cycle.

Average and rms currents are calculated for Current Doubler Rectifier stage using simplified models for estimation, assuming output inductors have the same inductance value.

Example:

V_IN = 800V, V_OUT = 12V, P_OUT = 1200W, I_OUT = 100A, F_SW = 100kHz Transformer turns ration (N) = 17 Output Inductor (L) = 3uH, uncoupled Output Stage = 'CurrentDoubler'

N = \frac{N p}{N s} = 17

f_{s w} = 100 k H z, T_{p} = 10 u s

As the primary side full bridge generates bipolar pulses, the current doubler halves the duty after rectification. The Current Doubler stage has two current paths: depending on the active diagonal of the PSFB, the current is rectified either through SR1 or SR2. Therefore, each inductor sees the pulse at 100kHz.

T_p = 10μs, switching cycle of 100 kHz

t_on = 5μs, maximum pulse width after rectification

At V_out= 12V, at V_in= 800V, Duty (D) = 51%:

t_{o n} = (D) (\frac{T_{p}}{2}) = 2.55 μ s

Assuming average voltage across the output inductors to be zero in steady state CCM operation:

V_{l o a v g} = 0 V, V_{o u t} = V_{S R a v g}

V_{o u t} = V_{S R a v g} = D (\frac{V_{i n}}{2 N}) = (0.51) (\frac{800}{(2) (17)}) = 12 V

Inductor ripple current and rms currents can be calculated as following:

v_{S R} (t) = \frac{V_{i n}}{N} = \frac{800}{17} = 47 V

V_{o u t} = 12 V, v_{S R} (t) = 47 V, Δ V = 35 V

i_{l o p - p} = \frac{(Δ V) (t_{o n})}{L} = \frac{(35) (2.55) 10^{- 6}}{(3) 10^{- 6}} = 29.8 A_{p p}

i_{l o r m s} = \sqrt[]{\frac{{(i_{l o p - p})}^{2}}{12} + {(\frac{I_{o}}{2})}^{2}} = \sqrt[]{\frac{{(29.8)}^{2}}{12} + {(\frac{100}{2})}^{2}} = 50.7 A_{r m s}

The average inductor current is half of the total output current:

i_{l o a v g} = \frac{I_{o}}{2} = \frac{100}{2} = 50 A

For Synchronous MOSFETs RMS current, a simplified approximation can be made by the following equation:

i_{S R r m s} = \sqrt[]{{((I_{o}) \sqrt[]{0.5})}^{2} + (\frac{{i_{l o p p}}^{2}}{12})}

i_{S R r m s} = \sqrt[]{{(100 \sqrt[]{0.5})}^{2} + \frac{{(29.8)}^{2}}{12}} = 71.2 A_{r m s}

It is important to mention that the RMS current in synchronous rectifiers is still higher than the rms inductor currents. Therefore, SR MOSFETs should be appropriately sized for high-output current applications. Conduction losses in SR MOSFETs increase by square of rms current.

P_{l o s s S R} = {(i_{S R r m s})}^{2} (R_{o n})

Transformer rms current on the secondary may be approximately equal to the output inductor rms current.

Summary:

The calculations use simplified current and voltage waveforms to approximate a starting point for component sizing. These calculations are supplemented by simulations to get more accurate measurements to adjust component values.

Important observations show that the output voltage is halved, and the output current is doubled by using a current doubler stage. The output inductor current average value is halved, and the transformer secondary side RMS current is also significantly reduced.

There are, however, a few downsides to this approach. Using two uncoupled output inductors introduces a challenge of equal current sharing in both output inductors. The user is invited to compare the advantages of using a coupled output inductor.

Since there are no high side Synchronous MOSFETs, there is a possibility of having reverse current going into the SR MOSFETs in DCM conditions. This DCM condition arises at low output current demand, either in steady state low load conditions or during transients. For example, load dump conditions result in reduced current demand.