32.4.4 Reset, WDT, Power-up Timer, and Brown-Out Reset Specifications
Note: 
                
- Asserted low.
Note: 
                
- Only if
                            PWRTE bit in the Configuration Word register is
                        programmed to ‘1’; 2 ms delay if PWRTE =0.
| Standard Operating Conditions (unless otherwise stated) | |||||||
|---|---|---|---|---|---|---|---|
| Param No. | Sym. | Characteristic | Min. | Typ. † | Max. | Units | Conditions | 
| RST01* | TMCLR | MCLR Pulse Width Low to ensure Reset | 2 | — | — | μs | |
| RST02* | TIOZ | I/O high-impedance from Reset detection | — | — | 2 | μs | |
| RST03 | TWDT | Watchdog Timer Time-out Period | — | 16 | — | ms | 1:512 Prescaler | 
| RST04* | TPWRT | Power-up Timer Period | — | 65 | — | ms | |
| RST06 | VBOR | Brown-out Reset Voltage | 2.55 — | 2.7 — | 2.85 1.9(1) | V V | BORV =  BORV =  | 
| RST07 | VBORHYS | Brown-out Reset Hysteresis | — | 40 | — | mV | |
| RST08 | TBORDC | Brown-out Reset Response Time | — | 3 | — | μs | |
| * - These parameters are characterized but not tested. † Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note: 
                 
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