23.10 Register Summary: ZCD Control
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x0F31 | Reserved | |||||||||
| 0x0F32 | ZCDCON | 7:0 | SEN | OUT | POL | INTP | INTN |
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x0F31 | Reserved | |||||||||
| 0x0F32 | ZCDCON | 7:0 | SEN | OUT | POL | INTP | INTN |
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.