22.5 Register Summary - CCP Control


Offset	Name	Bit Pos.	7	5	4	3	1
0x00 ... 0x0FA5	Reserved
0x0FA6	CCPR2	7:0	CCPR[7:0]
0x0FA6	CCPR2	15:8	CCPR[15:8]
0x0FA8	CCP2CON	7:0	EN	OUT	FMT	MODE[3:0]
0x0FA9	CCP2CAP	7:0					CTS[1:0]
0x0FAA	CCPR1	7:0	CCPR[7:0]
0x0FAA	CCPR1	15:8	CCPR[15:8]
0x0FAC	CCP1CON	7:0	EN	OUT	FMT	MODE[3:0]
0x0FAD	CCP1CAP	7:0					CTS[1:0]

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.