26.12.3 MDSRC
| Name: | MDSRC |
| Offset: | 0xF53 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SRCS[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 3:0 – SRCS[3:0] Modulator Source Selection bits
| SRCS[3:0] | Connection |
|---|---|
1110-1111 | Reserved |
1101 | MSSP2 - SDO |
1100 | MSSP1 - SDO |
1011 | EUSART2 TX (TX/CK output) |
1010 | EUSART2 RX (DT output) |
1001 | EUSART1 TX (TX/CK output) |
1000 | EUSART1 RX (DT output) |
0111 | CMP2 OUT |
0110 | CMP1 OUT |
0101 | PWM4 OUT |
0100 | PWM3 OUT |
0011 | CCP2 OUT |
0010 | CCP1 OUT |
0001 | MDBIT |
0000 | Pin selected by MDSRCPPS |