34.10.2 HLVDCON1

Low-Voltage Detect Control Register 1
Name: HLVDCON1
Offset: 0xF30

Bit 76543210 
     SEL[3:0] 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 3:0 – SEL[3:0] High/Low-Voltage Detection Limit Selection bits

Table 34-2. HLVD Detection Limits
SELDetection Limit
1111Reserved
11104.63V
11014.32V
11004.12V
10113.91V
10103.71V
10013.60V
10003.40V
01113.09V
01102.88V
01012.78V
01002.57V
00112.47V
00102.26V
00012.06V
00001.85V
Reset States: 
POR/BOR = 0000
All other resets = uuuu