23.12.2 CCPTMRS
| Name: | CCPTMRS |
| Offset: | 0xFAE |
CCP Timers Control Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| P4TSEL[1:0] | P3TSEL[1:0] | C2TSEL[1:0] | C1TSEL[1:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | |
Bits 7:6 – P4TSEL[1:0] PWM4 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
PWM4 based on TMR6 |
| 10 |
PWM4 based on TMR4 |
| 01 |
PWM4 based on TMR2 |
| 00 |
Reserved |
Bits 5:4 – P3TSEL[1:0] PWM3 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
PWM3 based on TMR6 |
| 10 |
PWM3 based on TMR4 |
| 01 |
PWM3 based on TMR2 |
| 00 |
Reserved |
Bits 3:2 – C2TSEL[1:0] CCP2 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
CCP2 is based off Timer5 in Capture/Compare mode and Timer6 in PWM mode |
| 10 |
CCP2 is based off Timer3 in Capture/Compare mode and Timer4 in PWM mode |
| 01 |
CCP2 is based off Timer1 in Capture/Compare mode and Timer2 in PWM mode |
| 00 |
Reserved |
Bits 1:0 – C1TSEL[1:0] CCP1 Timer Selection bits
| Value | Description |
|---|---|
| 11 |
CCP1 is based off Timer5 in Capture/Compare mode and Timer6 in PWM mode |
| 10 |
CCP1 is based off Timer3 in Capture/Compare mode and Timer4 in PWM mode |
| 01 |
CCP1 is based off Timer1 in Capture/Compare mode and Timer2 in PWM mode |
| 00 |
Reserved |