9 Adding Chip Peripherals

PIC32WM-BZ6204 supports CAN-FD, USB, Ethernet, QEI, CVD and Graphic interface as well as the communication interface (I2C, UART, SPI...). MCC will provide all the library and user can add the related driver/ interface in the project graph to build the application.

Once a peripheral is added to Project Graph, users can configure a variety of settings applicable to the peripheral. Upon code generation, the system generates code specific to the peripheral for the users. The system automatically adds the initialization of the peripheral, for example, SERCOM0_Initialize(), to the SYS_Initialize() function call.

Figure 9-1. Adding Peripheral to Project Graph
  • For more detailed documentation to understand the usage of various APIs available for a particular peripheral, refer to the MPLAB Harmony Peripheral Libraries. For more details, see MPLAB Harmony 3 Peripheral Library Application Examples for PIC32CX-BZ6 and PIC32WM-BZ6204 Family in Reference Documentation from Related Links.
  • There are also precompiled application examples available in <Discover Path>/csp_apps_pic32cxbz6_wmbz6. These examples are ready to use and help users learn by following them.

  • It is recommended to handle the Peripheral error properly if supported. For example Clearing STATUS.BUFOVF in SPI, and handling arbitration loss in I2C communication can allow on-going communication.

  • Interrupt priority for peripherals should be lesser than WSS interrupt priority, in case of high throughput requirement.

  • Ensure to disable the peripheral interrupts, if ISR context is not needed. For example TC and TCC compare/waveform generation mode is expected to generate periodic waveform. Disable the interrupt as it is not needed.

  • DMA mode is preferable than interrupt mode in case of high frequent peripheral interrupts. For example SPI with 8MHz, where CPU is expected to be interrupted every 1MHz once, this might have impact on high throughput wireless activity and vice versa.

  • Preferable to use lower priority for QSPI DMA channel, due to SW trigger source for DMA to avoid other DMA channels getting stopped during QSPI transaction.