35.20.12 UxP2
Note: The individual
bytes in this multibyte register can be accessed with the following register
names:
- UxP2H: Accesses the high byte P2[8]
- UxP2L: Accesses the low byte P2[7:0]
| Name: | UxP2 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| P2[8] | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| P2[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 8 – P2[8] Parameter 2 Most Significant bit
| Value | Name | Description |
|---|---|---|
| n | MODE = DMX | Most Significant bit of first address of receive block |
| n | MODE = DALI | Most Significant bit of number of half-bit periods of Idle time in Forward Frame detection threshold |
| x | All other modes/Limited featured UART | Not used |
Bits 7:0 – P2[7:0] Parameter 2 Least Significant bits
| Value | Name | Description |
|---|---|---|
| n | MODE = DMX | Least Significant bits of first address of receive block |
| n | MODE = DALI | Least Significant bits of number of half-bit periods of Idle time in Forward Frame detection threshold |
| n | MODE = LIN | Number of data bytes to transmit |
| n | MODE = Asynchronous Address | Receiver address |
| x | All other modes | Not used |