4.3 Software Modules

The CPU is executed at 8MHz using Internal RC Oscillator. The heart beat timer used to generate interrupt is configured to overflow at the maximum value. The prescalar value is set to 1024 and still the highest overflow value of 255 (8-bit) will not be sufficient to have a delay of 1 second. A variable is used to count the entry into ISR before the duty cycle is actually changed.

The firmware can be grouped under 4 major modules based on the tasks performed, as follows:
  1. Capture Pulse Width - icp_rx()
  2. Compute the Duty Cycle - icp_duty_compute()
  3. Queue the Sample - icp_enq()
  4. Capture with Automatic Calibration - Compare ISR