28.10 Register Summary - Universal Timer
Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x0386 | Reserved | |||||||||
0x0387 | TU16ACON0 | 7:0 | ON | CPOL | OM | OPOL | RDSEL | PRIE | ZIE | CIE |
0x0388 | TU16ACON1 | 7:0 | RUN | OSEN | CLR | LIMIT | CAPT | PRIF | ZIF | CIF |
0x0389 | TU16AHLT | 7:0 | EPOL | CSYNC | START[1:0] | RESET[1:0] | STOP[1:0] | |||
0x038A | TU16APS | 7:0 | PS[7:0] | |||||||
0x038B | TU16ATMR | 7:0 | TMR[7:0] | |||||||
15:8 | TMR[15:8] | |||||||||
0x038B | TU16ACR | 7:0 | CR[7:0] | |||||||
15:8 | CR[15:8] | |||||||||
0x038D | TU16APR | 7:0 | PR[7:0] | |||||||
15:8 | PR[15:8] | |||||||||
0x038F | TU16ACLK | 7:0 | CLK[4:0] | |||||||
0x0390 | TU16AERS | 7:0 | ERS[5:0] | |||||||
0x0391 ... 0x0392 | Reserved | |||||||||
0x0393 | TU16BCON0 | 7:0 | ON | CPOL | OM | OPOL | RDSEL | PRIE | ZIE | CIE |
0x0394 | TU16BCON1 | 7:0 | RUN | OSEN | CLR | LIMIT | CAPT | PRIF | ZIF | CIF |
0x0395 | TU16BHLT | 7:0 | EPOL | CSYNC | START[1:0] | RESET[1:0] | STOP[1:0] | |||
0x0396 | TU16BPS | 7:0 | PS[7:0] | |||||||
0x0397 | TU16BTMR | 7:0 | TMR[7:0] | |||||||
15:8 | TMR[15:8] | |||||||||
0x0397 | TU16BCR | 7:0 | CR[7:0] | |||||||
15:8 | CR[15:8] | |||||||||
0x0399 | TU16BPR | 7:0 | PR[7:0] | |||||||
15:8 | PR[15:8] | |||||||||
0x039B | TU16BCLK | 7:0 | CLK[4:0] | |||||||
0x039C | TU16BERS | 7:0 | ERS[5:0] | |||||||
0x039D ... 0x03BA | Reserved | |||||||||
0x03BB | TUCHAIN | 7:0 | CH16AB |