2.5 DDRC

The SAM9X60 device embeds a DDR PHY interface with calibrated output impedance. Compared to SAM9x5 designs, the serial resistors can be removed from the PCB DDR I/O lines. Calibration is done using a resistance connected to the DDR_CAL signal. Refer to the SAM9X60 data sheet for details.

Figure 2-4. SAM9X60 Recommended DDR_CAL and DDR_VREF

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