3.6 Data and Support FIFOs

The ATA8510/15 integrates two hardware buffers, a 32-byte deep data FIFO (DFIFO) and a 16-byte deep support FIFO (SFIFO). The DFIFO is used as a data buffer in buffered receive and transmit modes while the SFIFO serves as a buffer for the RSSI values in receive mode and as a buffer for the preamble data in transmit mode.

The following figure shows a diagram of the DFIFO and SFIFO block-level interconnections.