7.7.5.5.3 Data Format

The ASRC DSP core datapath is 24 bits wide, thus data size written to the DSP core is always 24 bits. The data written in the ASRC_THRx register can be up to 32 bits.

When the size of the data written to ASRC_THRx register does not match the DSP inherent size (24 bits), the data must be pre-processed. To adapt the potential size difference, the valid number of bits written in ASRC_THRx must be configured in ASRC_VBPS_IN.VBPS_INx. The possible sizes are 8, 10, 12, 14, 16, 18, 20, 24 and 32 bits.

If VBPS_INx is defined as less than or equal to 24 bits, data is first left-shifted by 24 minus VBPS_INx bits. To get full range extension, the extra bits introduced at LSB indexes are the MSB of the valid data (sign bit excluded). The resulting data is written in the DSP core.

If VBPS_INx is defined as 32 bits, data is right-shifted by 8 bits to get the 24 most significant bits before being sent to the DSP core.

Data read from the DSP core is always a 24-bit signed data. Data size read in the ASRC_RHRx register can be defined as 8, 10, 12, 14, 16, 18, 20, 24 and 32 bits in ASRC_VBPS_OUT.VBPS_OUTx. Thus post-processing must be performed to adapt the size difference.

If VBPS_OUTx is defined as less or equal to 24 bits, data is first right-shifted by 24 minus VBPS_OUTx bits.

If VBPS_OUTx is defined as 32 bits, data is first left-shifted by 8 bits. To get full range extension, the 8 extra bits introduced at LSB indexes are the 8 MSB of the 24-bit data from the DSP (sign bit excluded). The resulting data is written in ASRC_RHRx.

Whatever the value configured in VBPS_INx and VBPS_OUTx, each read or write access from/to the system bus carries only one audio data sample.