27.5.4 Brown-out Reset (BOR)

• BOR_VDDREG: After power-up or user reset, the BOR monitoring VDDREG is active. Its hysteresis values are loaded from NVM calibration User Config (UCFG) and stored in the BRCFGUSMOR_BOR register.
• BOR_VDDIO: After power-up or user reset, the BOR monitoring VDDIO is active. Its threshold and hysteresis values are loaded from NVM User Config (UCFG) and stored in the BRCFGUSMOR_BOR register.
• BOR_VDDA: After power-up or user reset, the BOR monitoring VDDA is active. Its threshold and hysteresis values are loaded from NVM Calibration User Config (UCFG)and stored in the BRCFGUSMOR_BOR register.
• DCBOR: After power-up or user reset, the DCBOR used in backup mode is inactive. Its threshold and hysteresis values are loaded from NVM Calibration User Config (UCFG)and stored in the BRCFGUDSSMOR_BOR register.

In all modes except the Backup mode the BOR_VDDREG and BOR_VDDIO/VDDA compare respectively the VDDREG and VDDIO/VDDA voltage with the VDDREG and VDDIO brown-out threshold level. This level is set during power-up when NVM calibration values are loaded. When VDDREG or VDDIO crosses below the brown-out threshold level, BOR generates a Reset.

To reduce power consumption, DCBOR is used in sampling mode. The Sampling Mode is a low-power mode where the DCBOR is being repeatedly enabled on a sampling clock’s ticks. The DCBOR will monitor the supply voltage for a short period of time and then go to a low-power disabled state until the next sampling clock tick. The frequency of the clock ticks is controlled by the Prescaler Select bit groups in the BOR register (BOR.DCBORPSEL). Please refer to “BOR – BOR Control” SFR for more details.

For BOR reset generation we have an input filter to filter-out any glitches which are less than 100nS. Supplementary BOR filtering is also possible for BOR_VDDA, BOR_VDDIO, and BOR_VDDREG by using the BOR.BORFILT bitfield.