36.5.3.3 USB Reset

The USB sends a USB reset signal when the user writes a one to the USB Reset bit (CTRLB.BUSRESET). When the USB reset has been sent, the USB Reset Sent Interrupt bit in the INTFLAG (INTFLAG.RST) is set and all pipes will be disabled.

If the bus was previously in a suspended state (i.e., the Start of Frame Generation Enable bit (CTRLB.SOFE) is zero), the USB will switch it to the Resume state, causing the bus to asynchronously set the Host Wakeup Interrupt flag (INTFLAG.WAKEUP). The CTRLB.SOFE bit will be set in order to generate SOFs immediately after the USB reset.

During USB reset the following registers are cleared:

• The All Host Pipe Configuration register (PCFG)
• The Host Frame Number register (FNUM)
• The Interval for the Bulk-Out/Ping transaction register (BINTERVAL)
• The Host Start-of-Frame Control register (HSOFC)
• The Pipe Interrupt Enable Clear/Set register (PINTENCLR/SET)
• The Pipe Interrupt Flag register (PINTFLAG)
• The Pipe Freeze bit in Pipe Status register (PSTATUS.FREEZE)

After the reset, the user should check the Speed Status field in the Status register (STATUS.SPEED) to find out the current speed according to the capability of the peripheral.