25.8.6 Interrupt Flag Status and Clear

Table 25-20. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: INTFLAG
Offset: 0x0C
Reset: 0x0000
Property: RW

Bit 15141312111098 
 OVFTAMPERCMP[5:0] 
Access RWRWRWRWRWRWRWRW 
Reset 00000000 
Bit 76543210 
 PER[7:0] 
Access RWRWRWRWRWRWRWRW 
Reset 00000000 

Bit 15 – OVF Overflow

This flag is cleared by writing a '1' to the flag.

This flag is set on the next CLK_RTC_CNT cycle after an overflow condition occurs, and an interrupt request will be generated if INTENCLR/SET.OVF is '1'.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Overflow interrupt flag.

Bit 14 – TAMPER Tamper

This flag is set after a tamper condition occurs, and an interrupt request will be generated if INTENCLR.TAMPER/ INTENSET.TAMPER is one.

Writing a '0' to this bit has no effect.

Writing a one to this bit clears the Tamper interrupt flag.

Bits 13:8 – CMP[5:0] Compare x

Bits 7:0 – PER[7:0] Periodic Interval x