14.3 Functional Description
The H2PB shares the AHB clock.
Each peripheral can be defined as Secure or Non-Secure through its related non-security NONSEC bit (refer to the peripheral dependency table for finding the index of each peripheral). Each NONSEC bit is included in 2 registers, one for setting it (NONSECSETA) and the other one for clearing it (NONSECCLRA). Both registers will return the same value when being read.
When set, the CTRLA.SECEN bit enables the Trust Zone access control based on the NONSEC bits. Any non-secure access to a peripheral whose NONSEC bit is cleared will return an error. When CTRLA.SECEN is cleared, all accesses, secure or not, are allowed to pass through the bridge.
Device is configured with SECEN = 1 if Trust Zone is present and with SECEN = 0, if Trust Zone is not present.
For devices without Trust Zone, the NONSEC bits and H2PB registers are configured through the PAC. All Peripherals are then accessible (with no Secure vs Non-Secure notion).
The CTRLA.PRIV bit defines if non-privileged accesses are allowed to access the H2PB registers.
When access errors are detected (address holes, security violations, accesses to write protected registers), the errors are reported in-band to the initiator by the H2PB, or by the client peripheral through the H2PB.
Interrupts
The H2PB does not generate any interrupt. Access errors are reported in-band.
Events
The H2PB does not use and does not generate events.
Sleep Mode Operation
The H2PB stays active in active, idle, standby or sleepwalking modes when transactions occur on the AHB/APB buses. It will be off in backup, off and hibernate modes.