8.1 Current Address Read

The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the VCC is maintained to the part. The address rollover during a read is from the last byte of the last page to the first byte of the first page of the memory.

A current address read operation will output data according to the location of the internal data word address counter. This is initiated with a Start condition, followed by a valid device address byte with the R/W bit set to logic ‘1’. The device will ACK this sequence, and the current address data word is serially clocked out on the SDA line. All types of read operations will be terminated if the bus host does not respond with an ACK (it NACKs) during the ninth clock cycle. After the NACK response, the host may send a Stop condition to complete the protocol, or it can send a Start condition to begin the next sequence.

Figure 8-1. Current Address Read
Note:
  1. For the AT24C01C, AT24C02C and AT24C04C, the @ indicates the A1 hardware client address bit. For the AT24C08C, the @ indicates the A9 word address bit.
  2. For the AT24C01C and AT24C02C, the $ indicates the A0 hardware client address bit. For the AT24C04C and AT24C08C, the $ indicates the A8 word address bit.