8.2.1 Protected Address Ranges Set by WPB1 and WPB0
The EEPROM array in the AT24CSW01X/AT24CSW02X will be
protected from writing in accordance with the WPB1 and WPB0 bit values as long as the WPRE
bit is set to logic ‘1’. If the WPRE bit is set to logic
‘0’, no portion of the EEPROM array will be protected. The combination
of these three bits creates five possible levels of protection for the device. The
protected address ranges of the memory are shown in Table 8-6.
| Protection Level | WPRE | WPB1 | WPB2 | Protected Address Range | Unprotected Address Range | ||
|---|---|---|---|---|---|---|---|
| 1-Kbit | 2-Kbit | 1-Kbit | 2-Kbit | ||||
| None | 0 | X | X | None | None | 00h–7Fh | 00h-FFh |
| Upper ¼ | 1 | 0 | 0 | 60h–7Fh | C0h–FFh | 00h–5Fh | 00h–BFh |
| Upper ½ | 1 | 0 | 1 | 40h–7Fh | 80h–FFh | 00h–3Fh | 00h–7Fh |
| Upper ¾ | 1 | 1 | 0 | 20h–7Fh | 40h–FFh | 00h–1Fh | 00h–3Fh |
| Full Array | 1 | 1 | 1 | 00h-7Fh | 00h-FFh | None | None |