15.5.1 H2PB CONTROL Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | CTRLA |
| Offset: | 0x0 |
| Reset: | 0x00000000 |
| Property: | R/W |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SECEN | PRIV | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bit 3 – SECEN Security Access Enable
When set, this bit enables the Trust Zone access-control based on the NONSEC bits and any non-secure access to a peripheral which has its NONSEC bit cleared will be rejected and returned as an in-band error to the initiator.
When cleared, this bit disables the Trust Zone access-control and all accesses are allowed to pass though the bridge.
Bit 2 – PRIV Privileged Access
When set, this bit will allow only privileged accesses to the H2PB registers. Any non-privileged read or write access to the bridge’s own registers will be rejected if this bit is set and will be returned as an in-band error to the initiator.