33.5 Register Summary


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRLA	7:0						PRIV
		15:8
		23:16
		31:24
0x04	CTRLOP	7:0	PREPG				NVMOP[3:0]
		15:8
		23:16
		31:24
0x08 ... 0x0B	Reserved
0x0C	INTENCLR	7:0	SECERR	OPERR	WPERR	BUSERR	FIFOERR	CFGERR	KEYERR	DONE
		15:8			WRERR	RSTERR
		23:16
		31:24
0x10	INTENSET	7:0	SECERR	OPERR	WPERR	BUSERR	FIFOERR	CFGERR	KEYERR	DONE
		15:8			WRERR	RSTERR
		23:16
		31:24
0x14	INTFLAG	7:0	SECERR	OPERR	WPERR	BUSERR	FIFOERR	CFGERR	KEYERR	DONE
		15:8			WRERR	RSTERR
		23:16
		31:24
0x18	INTFLAGSET	7:0	SECERR	OPERR	WPERR	BUSERR	FIFOERR	CFGERR	KEYERR	DONE
		15:8			WRERR	RSTERR
		23:16
		31:24
0x1C	STATUS	7:0								BUSY
		15:8
		23:16
		31:24
0x20	KEY	7:0	FEATURE[7:0]
		15:8	CODE[7:0]
		23:16	CODE[15:8]
		31:24	CODE[23:16]
0x24	ADDR	7:0	ADDR[7:0]
		15:8	ADDR[15:8]
		23:16	ADDR[23:16]
		31:24	ADDR[31:24]
0x28	SRCADDR	7:0	SRCADDR[7:0]
		15:8	SRCADDR[15:8]
		23:16	SRCADDR[23:16]
		31:24	SRCADDR[31:24]
0x2C	DATA0	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x30	DATA1	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x34	DATA2	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x38	DATA3	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x3C	DATA4	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x40	DATA5	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x44	DATA6	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x48	DATA7	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x4C ... 0x4F	Reserved
0x50	PWP	7:0	PWPSIZE[7:0]
		15:8	PWPEN	PWPLOCK	PWPMIR		PWPSIZE[11:8]
		23:16	PWPBASE[7:0]
		31:24					PWPBASE[11:8]