39.4.8 Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Table 39-14. 
Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
AD20TADADC Clock Period0.5—9μsUsing FOSC as the ADC clock source ADCS = 1
AD21—2—μsUsing FRC as the ADC clock source ADCS = 0
AD22TCNVConversion Time(1) —14TAD+2TCY——Using FOSC as the ADC clock source ADCS = 1
—16TAD+2TCY——Using FRC as the ADC clock source ADCS = 0
AD23TACQAcquisition Time—2—μs
AD24THCDSample-and-Hold Capacitor Disconnect Time—2TAD+1TCY——Using FOSC as the ADC clock source ADCS = 1
—3TAD+2TCY——Using FRC as the ADC clock source ADCS = 0

* - These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Does not apply for the FRC oscillator.
Figure 39-10. ADC Conversion Timing (ADC Clock FOSC-Based)
Figure 39-11. ADC Conversion Timing (ADC Clock from FRC)
Note:
  1. If the ADC clock source is selected as FRC, a time of TCY is added before the ADC clock starts. This allows the SLEEP instruction to be executed.