26.3.9 SMTxSIG

SMT Signal Selection bits

Name:	SMTxSIG
Offset:	0xF1A,0xF08


Bit	7	6	5	4	3	2	1	0
				SSEL[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 4:0 – SSEL[4:0] SMT Signal Selection bits

Table 26-2. SMT Signal Selection
SSEL[4:0]	SMT1 Signal Source	SMT2 Signal Source
`11111-10111`	Reserved	Reserved
`10110`	ZCDOUT	ZCDOUT
`10101`	C3OUT	C3OUT
`10100`	C2OUT	C2OUT
`10011`	C1OUT	C1OUT
`10010`	PWM7OUT	PWM7OUT
`10001`	PWM6OUT	PWM6OUT
`10000`	CCP5OUT	CCP5OUT
`01111`	CCP4OUT	CCP4OUT
`01110`	CCP3OUT	CCP3OUT
`01101`	CCP2OUT	CCP2OUT
`01100`	CCP1OUT	CCP1OUT
`01011`	SMT2 overflow	Reserved
`01010`	Reserved	SMT1 overflow
`01001`	TMR8 postscaled output	TMR8 postscaled output
`01000`	TMR7 postscaled output	TMR7 postscaled output
`00111`	TMR6 postscaled output	TMR6 postscaled output
`00110`	TMR5 postscaled output	TMR5 postscaled output
`00101`	TMR4 postscaled output	TMR4 postscaled output
`00100`	TMR3 postscaled output	TMR3 postscaled output
`00011`	TMR2 postscaled output	TMR2 postscaled output
`00010`	TMR1 postscaled output	TMR1 postscaled output
`00001`	TMR0 postscaled output	TMR0 postscaled output
`00000`	Pin Selected by SMT1SIGPSS	Pin Selected by SMT2SIGPSS

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