34.10.2 HLVDCON1

Low-Voltage Detect Control Register 1
Name: HLVDCON1
Offset: 0xEC3

Bit 76543210 
     SEL[3:0] 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 3:0 – SEL[3:0] High/Low-Voltage Detection Limit Selection bits

Table 34-2. HLVD Detection Limits
SEL Detection Limit
1111 Reserved
1110 4.63V
1101 4.32V
1100 4.12V
1011 3.91V
1010 3.71V
1001 3.60V
1000 3.40V
0111 3.09V
0110 2.88V
0101 2.78V
0100 2.57V
0011 2.47V
0010 2.26V
0001 2.06V
0000 1.85V
Reset States: 
POR/BOR = 0000
All other resets = uuuu