3.7.4 CONFIG4
| Name: | CONFIG4 |
| Offset: | 0x300006 |
Configuration Word 4
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| LVP | SCANE | WRTD | WRTB | WRTC | |||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 1 | 1 | 1 | 1 | 1 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WRT3 | WRT2 | WRT1 | WRT0 | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 1 | 1 | 1 |
Bit 13 – LVP Low-Voltage Programming Enable bit
The LVP bit cannot be written (to zero) while operating from the LVP programming interface. The purpose of this rule is to prevent the user from dropping out of LVP mode while programming from LVP mode, or accidentally eliminating LVP mode from the Configuration state.
| Value | Description |
|---|---|
| 1 | Low-voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE Configuration bit is ignored. |
| 0 | HV on MCLR/VPP must be used for programming |
Bit 12 – SCANE Scanner Enable bit
| Value | Description |
|---|---|
| 1 | Scanner module is available for use, PMD0[SCANMD] bit enables the module |
| 0 | Scanner module is NOT available for use, PMD0[SCANMD] bit is ignored |
Bit 10 – WRTD Data EEPROM Write Protection bit
| Value | Description |
|---|---|
| 1 | Data EEPROM NOT write-protected |
| 0 | Data EEPROM write-protected |
Bit 9 – WRTB Boot Block Write Protection bit
| Value | Description |
|---|---|
| 1 | Boot Block NOT write-protected |
| 0 | Boot Block write-protected |
Bit 8 – WRTC Configuration Register Write Protection bit
| Value | Description |
|---|---|
| 1 | Configuration Registers NOT write-protected |
| 0 | Configuration Registers write-protected |
Bits 0, 1, 2, 3 – WRTn User NVM Self-Write Protection bits
| Value | Description |
|---|---|
| 1 | Corresponding Memory Block NOT write-protected |
| 0 | Corresponding Memory Block write-protected |