4.6.4.2 Design Layout Recommendations

When designing the ISC interface, consider the following recommendations:

  • Match signal lengths to within 50 mils. Affected PIOs in the example above are PC9 to PC24.
  • Place the clock lines (PC21 and PC24) at least 3 times the trace width away from other signals for noise immunity.
  • Place data signals at least 2 times the trace width away from any other data traces.
  • Place data signals at least 2 times the trace width away from any copper plan.
Figure 4-29. ISC Layout Example