3.2.5 System Pins Description

Table 3-4. System Pins Description
Pin No.Pin NamePower RailDescription
145CLK_AUDIOVDD_3V3Audio Main System Bus Clock Frequency Output
151USBA_NVDD_3V3USB Device High-Speed Data -
152USBA_PVDD_3V3USB Device High-Speed Data +
157HSIC_STROBEVDDHSIC (1.2V)USB High-Speed Inter-Chip Strobe
156HSIC_DATAVDDHSIC (1.2V)USB High-Speed Inter-Chip Data
153USBB_NVDD_3V3USB Host Port B High-Speed Data -
154USBB_PVDD_3V3USB Host Port B High-Speed Data +
7NRSTVDDBUModule Reset

A 100 kOhm pull-up must be provided by the host board

140COMPNVDDBUExternal Analog Data Input
139COMPPVDDBUExternal Analog Data Input
146PIOBU1VDDBUTamper I/O #1
135PIOBU2VDDBUTamper I/O #2
137PIOBU3VDDBUTamper I/O #3
147PIOBU4VDDBUTamper I/O #4
138PIOBU5VDDBUTamper I/O #5
148PIOBU6VDDBUTamper I/O #6
136PIOBU7VDDBUTamper I/O #7
134RXDVDDBURXLP Receive Data Input
10SHDNVDDBUShutdown Control
187WKUPVDDBUModule Wake-Up

A 100 kOhm pull-up to VDDBU must be provided by the host board

178VTHVDD_MAINLow Voltage Threshold Detection Input
101NCS_QSPIVDD_3V3Embedded QSPI Chip Select Input
83NC–Not connected
41NC–Not connected
89ETH_TX_P–Physical Transmit Signal (+ differential)
88ETH_TX_N–Physical Transmit Signal (– differential)
87ETH_RX_P–Physical Receive Signal (+ differential)
86ETH_RX_N–Physical Receive Signal (– differential)
84ETH_LED0VDD_3V3Programmable LED0 Output
182nSTART_SOMVDD_MAINModule Start-Up Control Input
42RXD_WILC_DBGVDD_3V3Used for Radio Debug. UART RXD
43TXD_WILC_DBGVDD_3V3Used for Radio Debug. UART TXD