3.2.4 PIOD Pin Description

Pad No. Power Rail I/O Type Primary Alternate PIO Peripheral Reset State (Signal, Dir, PU, PD, HiZ, ST) Note
Signal Dir Signal Dir Func Signal Dir IO Set
33 VDD_3V3 GPIO_CLK PD0 I/O A LCDPCK O 2 PIO, I, PU, ST
B FLEXCOM4_IO4 O 1
C UTXD3 O 2
D GTSUCOMP O 2
F A23 O 2
32 VDD_3V3 GPIO PD1 I/O A LCDDEN O 2 PIO, I, PU, ST
D GRXCK I 2
F A24 O 2
103 VDD_3V3 GPIO_CLK PD2 I/O A URXD1 I 1 PIO, I, PU, ST
D GTXER O 2
E ISI_MCK O 2
F A25 O 2
104 VDDANA GPIO_AD PD3 I/O PTC_ROW0 A UTXD1 O 1 PIO, I, PU, ST
B FIQ I 2
D GCRS I 2
E ISI_D11 I 2
F NWAIT I 2
105 VDDANA GPIO_AD PD4 I/O PTC_ROW1 B URXD2 I 1 PIO, I, PU, ST Note (2)
D GCOL I 2
E ISI_D10 I 2
F NCS0 O 2
109 VDDANA GPIO_AD PD5 I/O PTC_ROW2 B UTXD2 O 1 PIO, I, PU, ST Note (2)
D GRX2 I 2
E ISI_D9 I 2
F NCS1 O 2
106 VDDANA GPIO_AD PD6 I/O PTC_ROW3 A TCK I 2 PIO, I, PU, ST Note (2)
D GRX3 I 2
E ISI_D8 I 2
F NCS2 O 2
107 VDDANA GPIO_AD PD7 I/O PTC_ROW4 A TDI I 2 PIO, I, PU, ST Note (3)
D GTX2 O 2
E ISI_D0 I 2
F NWR1/NBS1 O 2
108 VDDANA GPIO_AD PD8 I/O PTC_ROW5 A TDO O 2 PIO, I, PU, ST Note (3)
D GTX3 O 2
E ISI_D1 I 2
F NANDRDY I 2
110 VDDANA GPIO_AD PD9 I/O PTC_ROW6 A TMS I 2 PIO, I, PU, ST Note (3)
D GTXCK O 2
E ISI_D2 I 2
111 VDDANA GPIO_AD PD10 I/O PTC_ROW7 A NTRST I 2 PIO, I, PU, ST Note (3)
D GTXEN O 2
E ISI_D3 I 2
118 VDDANA GPIO_AD PD11 I/O PTC_COL0 A TIOA1 I/O 3 PIO, I, PU, ST Note (3)
B PCK2 O 2
D GRXDV I 2
E ISI_D4 I 2
119 VDDANA GPIO_AD PD12 I/O PTC_COL1 A TIOB1 I/O 3 PIO, I, PU, ST Note (3)
B FLEXCOM4_IO0 I/O 2
D GRXER I 2
E ISI_D5 I 2
116 VDDANA GPIO_AD PD13 I/O PTC_COL2 A TCLK1 I 3 PIO, I, PU, ST Note (3)
B FLEXCOM4_IO1 I/O 2
D GRX0 I 2
E ISI_D6 I 2
117 VDDANA GPIO_AD PD14 I/O PTC_COL3 A TCK I 1 PIO, I, PU, ST Note (3)
B FLEXCOM4_IO2 I/O 2
D GRX1 I 2
E ISI_D7 I 2
114 VDDANA GPIO_AD PD15 I/O PTC_COL4 A TDI I 1 PIO, I, PU, ST Note (3)
B FLEXCOM4_IO3 O 2
D GTX0 O 2
E ISI_PCK I 2
115 VDDANA GPIO_AD PD16 I/O PTC_COL5 A TDO O 1 PIO, I, PU, ST Note (3)
B FLEXCOM4_IO4 O 2
D GTX1 O 2
E ISI_VSYNC I 2
112 VDDANA GPIO_AD PD17 I/O PTC_COL6 A TMS I 1 PIO, I, PU, ST Note (3)
D GMDC O 2
E ISI_HSYNC I 2
113 VDDANA GPIO_AD PD18 I/O PTC_COL7 A NTRST I 1 PIO, I, PU, ST Note (3)
D GMDIO I/O 2
E ISI_FIELD I 2
120 VDDANA GPIO_AD PD19 I/O B TWD1 I/O 3 PIO, I, PU, ST Note (1)
122 VDDANA GPIO_AD PD20 I/O B TWCK1 I/O 3 PIO, I, PU, ST Note (1)
132 VDDANA GPIO_AD PD25 I/O AD6 A SPI1_SPCK O 3 PIO, I, PU, ST
127 VDDANA GPIO_AD PD26 I/O AD7 A SPI1_MOSI I/O 3 PIO, I, PU, ST
C FLEXCOM2_IO0 I/O 2
123 VDDANA GPIO_AD PD27 I/O AD8 A SPI1_MISO I/O 3 PIO, I, PU, ST
B TCK I 3
C FLEXCOM2_IO1 I/O 2
124 VDDANA GPIO_AD PD28 I/O AD9 A SPI1_NPCS0 I/O 3 PIO, I, PU, ST
B TDI I 3
C FLEXCOM2_IO2 I/O 2
131 VDDANA GPIO_AD PD29 I/O AD10 A SPI1_NPCS1 O 3 PIO, I, PU, ST Note (2)
B TDO O 3
C FLEXCOM2_IO3 O 2
D TIOA3 I/O 3
130 VDDANA GPIO_AD PD30 I/O AD11 A SPI1_NPCS2 O 3 PIO, I, PU, ST Note (2)
B TMS I 3
C FLEXCOM2_IO4 O 2
D TIOB3 I/O 3
Note:
  1. Fixed feature due to the WLSOM1 internal connection.
  2. Limited feature compared to SAMA5D2 due to the WLSOM1 internal use of specific functionality, for example, QSPI, GMAC.
  3. Limited feature compared to SAMA5D2 due to the use of a part of the functionality for other features in the WLSOM1, for example, GMAC, ISC, FLEXCOM, etc.