4.16.2 Over-Temperature Detection

A mechanism is provided within the device to detect when the die junction temperature exceeds a threshold. As shown in Table 4-2, there is a rising and falling die temperature threshold. The over-temperature condition is triggered when the rising temperature threshold is exceeded causing the assertion of the Over-Temperature Error (OT) status bit in the Status 2 (STS2) register. If the interrupt status is not masked via the Over-Temperature Error Interrupt Mask (OTM) bit in the Interrupt Mask 2 (IMSK2) register, the IRQ_N pin will assert. The Over-Temperature Error status bit will not be cleared until the die temperature falls below the falling temperature threshold.

Regardless of the state of the Over-Temperature Error status bit, the device disables this function when in the SLEEP power state and the IRQ_N pin will not be asserted.