In MII and SC-MII modes, a 25 MHz crystal must be placed
between XTO and XTI. This crystal should meet the requirements in Table 7-21 below.
Table 7-21. Recommended Crystal
SpecificationsParameter | Min | Typ | Max | Units | Notes |
---|
Crystal Cut | AT (typical) | |
Crystal Oscillation Mode | Fundamental | |
Crystal Calibration Mode | Parallel Resonant Mode | |
Frequency | | 25.000 | | MHz | |
Tolerance | | | ±100 | ppm | Note 1, 2 |
Recommended Maximum Shunt Capacitance | | | 6 | pF | |
Recommended Load Capacitance | | 10-22 | | pF | Note 3 |
Drive Level | | 50 | | μW | |
Recommended Maximum Equivalent Series Resistance (ESR) | | | 100 | Ω | |
XTI/XTO Pin Capacitance | | 2 | | pF | Note 4 |
Note:
- The total deviation for the transmitter clock
frequency is specified by IEEE Std 802.3‑2022 Clause 147 as
±100 ppm.
- This parameter must include increased variation
over the expected operational lifetime of the application (aging),
temperature, and load capacitance.
- Load capacitance per crystal terminal. The
terminals should each see the same load.
- This number includes the pad, the bond wire and
the lead frame. Printed circuit board trace capacitance is not
included in this value. The XTI/XTO pin and PCB trace capacitance
values are required to accurately calculate the value of the two
external load capacitors. These two external load capacitors determine
the accuracy of the 25.000 MHz frequency.
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