5.1.3 PHY Identifier 1 Register

This register contains the Organizationally Unique Identifier (OUI) as specified in IEEE Std 802.3 Clause 22. Ethernet devices read this register to determine the upper three bytes of the Ethernet MAC address. The two least significant bits of the OUI are always 0 due to legacy compatibility, these two bits are not stored in this nor the following register. The OUI in both registers is stored in bit-reverse order, meaning the most significant bit (MSB) is stored in the register bit offset 0. The OUI is stored in little-endian format, meaning the most significant byte is stored in the following register. When combining these two data formats, the resulting data in the registers is saved as 0x03E000. Left shifting by two bits, results in the value of 0x0F8000, which corresponds to an OUI of 00:80:0F.
Name: PHY_ID1
Address: 0x02

Bit 15141312111098 
 OUI[2:9] 
Access RORORORORORORORO 
Reset 00000000 
Bit 76543210 
 OUI[10:17] 
Access RORORORORORORORO 
Reset 00000111 

Bits 15:8 – OUI[2:9] Organizationally Unique Identifier

This field contains the 3rd through the 10th bits of the Organizationally Unique Identifier (OUI) as specified in IEEE Std 802.3 Clause 22.

Bits 7:0 – OUI[10:17] Organizationally Unique Identifier

This field contains the 11th through the 18th bits of the Organizationally Unique Identifier (OUI) as specified in IEEE Std 802.3 Clause 22.