10.2.1 Overview

The ATWINC3400-MR210xA has a Serial Peripheral Interface (SPI) that operates as an SPI slave. The SPI interface can be used for control and for serial I/O of 802.11 and Bluetooth Low Energy data. The SPI pins are mapped as shown in the following table. The SPI is a full-duplex, slave-synchronous serial interface that is available immediately following a Reset when pin 2 (SPI_CFG) is tied to VDDIO.

Table 10-2. SPI Interface Pin Mapping
Pin #SPI function
2CFG: Must be tied to VDDIO
25SSN: Active-Low Slave Select
26MOSI(RXD): Serial Data Receive
23SCK: Serial Clock
24MISO(TXD): Serial Data Transmit


When the SPI is not selected, that is, when the SSN is high, the SPI interface will not interfere with data transfers between the serial-master and other serial-slave devices. When the serial-slave is not selected, its transmitted data output is buffered, resulting in a high impedance drive onto the MISO line.

The SPI interface responds to a protocol that allows an external host to read or write any register in the chip, as well as, initiate DMA transfers.

The SPI SSN, MOSI, MISO and SCK pins of the ATWINC3400-MR210xA have internal programmable pull-up resistors. These resistors must be programmed to be disabled; otherwise, if any of the SPI pins are driven to a low level while the ATWINC3400-MR210xA is in the low-power sleep state, the current will flow from the VDDIO supply through the pull-up resistors, increasing the current consumption of the module.