12.10.9 PIE7
Note: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt controlled by registers PIE1 through
PIE7.
| Name: | PIE7 |
| Offset: | 0x009D |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OPA4CIE | OPA3CIE | OPA2CIE | OPA1CIE | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 3 – OPA4CIE OPA4 Self-Calibration Complete Interrupt Enable
| Value | Description |
|---|---|
| 1 | OPA4 Self-Calibration interrupts are enabled |
| 0 | OPA4 Self-Calibration interrupts are disabled |
Bit 2 – OPA3CIE OPA3 Self-Calibration Complete Interrupt Enable
| Value | Description |
|---|---|
| 1 | OPA3 Self-Calibration interrupts are enabled |
| 0 | OPA3 Self-Calibration interrupts are disabled |
Bit 1 – OPA2CIE OPA2 Self-Calibration Complete Interrupt Enable
| Value | Description |
|---|---|
| 1 | OPA2 Self-Calibration interrupts are enabled |
| 0 | OPA2 Self-Calibration interrupts are disabled |
Bit 0 – OPA1CIE OPA1 Self-Calibration Complete Interrupt Enable
| Value | Description |
|---|---|
| 1 | OPA1 Self-Calibration interrupts are enabled |
| 0 | OPA1 Self-Calibration interrupts are disabled |