34.6.4.1.2 Client DMA

When using the I2C client with DMA, an address match causes the address Interrupt flag (INTFLAG.ADDRMATCH) to be raised. After the interrupt is serviced, the data transfer is performed through DMA.

The I2C client generates the following requests:
  • Read data received (RX) – The request is set when host read data is received. The request is cleared when DATA is read.
  • Write data needed for transmit (TX) – The request is set when data are needed for a host write operation. The request is cleared when DATA is written.
  • Read data received (RX) – If the FIFO is disabled, the request is set when host read data are received. If the FIFO is enabled, the request is set when the RX FIFO threshold is reached. The request is cleared when DATA is read.
  • Write data needed for transmit (TX) – If the FIFO is disabled, the request is set when data are needed for a host write operation. If the FIFO is enabled, the request is set when the TX FIFO threshold is reached (CTRLC.TXTRHOLD). The request is cleared when DATA is written.